DMX FPGA

Xilinx Zynq DMX controller

DMX FPGA
One of my first projects when I started working for transtechnik (now ETC) was a DMX512 router, called E-Gate. References to that project can still be found on the ETC website. And even the windows software I wrote, called E-Gatekeeper, can still be downloaded, and it still works (even on Windows 10) (E-gatekeeper screenshot image copyright by ETC GmbH) The hardware was based on a Motorola (now NXP) PowerPC MPC860 CPU with a Xilinx FPGA. [Read More]

Apple pie from scratch

Designing a pipelined RISC-V SoC

Apple pie from scratch
If you wish to make an apple pie from scratch, you must first invent the universe. The famous quote from Carl Sagan could also be applied to computer science, if you want to make a program from scratch you must first invent the universe. Since I only had 2 weeks vacation, and inventing a whole universe would have been to much work, I skipped a few parts and started with designing a RISC-V core. [Read More]

Prettige Kerst

Merry X-Mas

Prettige Kerst
Prettige Kerst, Merry X-Mas, of course in style, by using a Xilinx FPGA to control a cheap 64x32 RGB LED matrix display. I wrote a small program in VHDL that shift out a image to the RGB module and takes care of everything. After building it with Xilinx Vivado the resulting schematic looks like this; Of course if this is not an example of how to do things for a real project, first of all the LED module lacks features like PWM control, current correction, over temperature protection, and simply the needed brightness compared to professional displays that are for example produced by my one of my clients. [Read More]

SPI SID

FPGA Based SPI to SID bridge

SPI SID
The MOS Technology 6581/8580 SID (Sound Interface Device) is the almost 40 year old sound chip that was used in the famous Commodore 64. It uses a 5bit address / 8bit data synchronous bus with a chip select, rw, and clock signal. Since the chip uses the 1MHz (well not exactly 1MHz as I’ll explain later) clock signal also to generate all the audio frequencies, so it is important that the clock signal is stable, even though the read/write access would work fine with a unstable clock as long as the signal setup times are correct. [Read More]